Cache Simulator v1.0

Cache simulator is implemented in C. It takes several parameters describing the cache and a trace file describing the memory access for a specific program. The simulator will output several statistics (e.g. hit rate, total running time of the program, etc).


Configuration File

Cache simulator takes the configuration file as the first command line argument. The following are the necessary parameters required to setup the cache and to get the above said outputs. It contains 6 lines in the following order.

  • Line size: Specifies the line (AKA block) size for the cache in bytes. This should always be a non-negative power of 2 (i.e. 1,2,4,8,etc).
  • Associativity: Specifies the associativity of the cache. A value of “1” implies a direct-mapped cache, while a “0” value implies fully-associative. Should always be a non-negative power of 2.
  • Data size: Specifies the total size of the data in the cache. This does not include the size of any overhead (such as tag size). It should be specified in KB and be a non-negative power of 2. For example, a value of “64” means a 64KB cache.
  • Replacement Policy: Specifies the replacement policy to be used. Should be either “0” for random replacement or “1” for LRU. No other values are valid.
  • Miss penalty: Specifies the number of cycles penalized on a cache miss. May be any positive integer.
  • Write allocate: Specifies the cache policy on store misses. A value of “0” means write-no-allocate. A value of “1” means write-allocate. Any other value is invalid.

The write policy is “Write Back”, i.e. write back to cache and wait till it is expelled to update the memory.

Trace File:

Cache Simulator will take the trace file as the second command line argument. The trace file will specify all the data memory accesses that occur in the sample program. Each line in the trace file will specify a new memory reference. Each line in the trace cache will therefore have the following three fields:

  • Access Type: A single character indicating whether the access is a load (‘l’) or a store (‘s’).
  • Address: A 32-bit integer (in unsigned hexidecimal format) specifying the memory address that is being accessed. For example, “0xff32e100” specifies that memory address 4281524480 is accessed.
  • Instructions since last memory access: Indicates the number of instructions of any type that executed between since the last memory access (i.e. the one on the previous line in the trace). For example, if the 5th and 10th instructions in the program’s execution are loads, and there are no memory operations between them, then the trace line for with the second load has “4” for this field.


Simulator Output

  • Hit Rate – Load Hit Rate, Store Hit Rate
  • Average Memory Access time
  • Total Run time

Total Hit rate = No of Hits/ Total no of Instructions

Load Hit rate = No of Load instruction hits/ Total no of Load Instructions

Store Hit rate = No of Store instructions hits/ Total no of Store instructions

Average memory Access time = Load Hit Contribution + Load Miss Contribution + Store Hit Contribution + Store Miss Contribution



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